| 引用本文: | 黎铁军,王爱平,李思昆.一种基于Wallace树的分散式DCT/IDCT体系结构.[J].国防科技大学学报,2006,28(1):68-72.[点击复制] |
| LI Tiejun,WANG Aiping,LI Sikun.A New DCT/IDCT Architecture Based on Wallace Trees[J].Journal of National University of Defense Technology,2006,28(1):68-72[点击复制] |
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| 一种基于Wallace树的分散式DCT/IDCT体系结构 |
| 黎铁军, 王爱平, 李思昆 |
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(国防科技大学 计算机学院，湖南 长沙 410073)
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| 摘要: |
| 提出了一种新的基于Wallace树的分散式DCT/IDCT体系结构。它不依赖于ROM和乘法器，用面积开销低的加法器、移位器和4-2压缩器，实现了乘法密集的DCT/IDCT算法。该体系结构在SMIC 0.18μm工艺上进行了设计和综合，可以达到100Mpixels/s的吞吐率，只消耗了36 141个晶体管和1024bits转换存储器，时序—面积性能较已有的体系结构有了显著的改善。 |
| 关键词: MPEG DCT IDCT Wallace树 体系结构 |
| DOI： |
| 投稿日期：2005-09-10 |
| 基金项目:国家自然科学基金资助项目(90207019)；国家863高技术研究发展计划基金资助项目(2002AA1Z1480) |
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| A New DCT/IDCT Architecture Based on Wallace Trees |
| LI Tiejun, WANG Aiping, LI Sikun |
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(College of Computer, National Univ. of Defense Technology, Changsha 410073, China)
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| Abstract: |
| This paper proposes a Wallace-tree based new DCT/IDCT architecture, which does not depend on ROM and multipliers any more, but utilizes low cost adders, shifts and 4-2 compressors to implement the multiplication-dense DCT/IDCT algorithm. Designed and synthesized by SMIC 0.18 μm technology, the architecture could achieve 100Mpixels/sec throughout with cost of only36 141transistors and 1024 bits transform memory. As a result, a far better performance of time series and space is obtained than that of the existing architecture. |
| Keywords: MPEG DCT IDCT Wallace tree architecture |
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