Branch-delay is one of the RISC (Reduced Instruction Set Computer)technology characters. According to our simulation to scalar programs on Cray-l-Like supercomputer，about 10～20%CPU time is occupied by branch inst. In this paper，the implementation method of branch-delay technology in i860 microprocessor is deeply analyzed. The method of introducing branch-delay technology into Cray-l-Like prototype is studied. Simulation results and theoretical analysis show that reducing one cp execute time for each branch inst will increase system pertormance by 4～5 percent.