VHDL is a standard language for the design and description of digital circuits. As a case study several array processors fullfilling the sort algorithm designed in VDHL are discussed here. Their concise VHDL description can be synthesized into FP-GA or ASIC gate-level netlist. Practice shows that applying VHDL can greatly improve the efficiency of digital system design.
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欧钢,陈辉煌,沈振康.阵列排序器的VHDL设计方法[J].国防科技大学学报,1996,18(2):75-79. Ou Gang, Chen Huihuang, Shen Zhenkang. Sorter Array Processor Design by Using VHDL[J]. Journal of National University of Defense Technology,1996,18(2):75-79.