Based on the independent national protocol (GJB 7377.1-2011), the current research proposes a coding and decoding algorithm for passive RFID tags, which features variation-tolerance of the clock frequency. This algorithm substantially considered the influence upon coding and decoding caused by clock frequency variation, counting error, dividing error, et al. Subsequently, the clock restriction that ensures correct coding and decoding was deduced. and a method to implement coding and decoding was found. As the simulation results show, the proposed algorithm has a low requirement for clock accuracy. It will meet the demand as long as the clock frequency is higher than 1.60 MHz. Furthermore, this algorithm dramatically reduces the difficulty and complexity of hardware implementation. Compared with that of previous works, the power consumption of this work decreases by nearly 50%.