In a positioning system based on calculating the distance by measuring the time delay, increasing the accuracy of the estimation of time delay is a key factor to improve the performance of navigation receivers. Generally, the off-the-shelf timekeeping chip cannot achieve the performance of high accuracy and low power consumption at the same time, which is especially required in portable and hand-held navigation receivers. A novel architecture of the timekeeping chip was presented to solve that contradiction. In this architecture, the time is compensated directly according to the temperature. And two circuit operation states, the low-power operation and the high-power bursty process, work alternately in turn. The chip can achieve the time accuracy of 0.5ppm and the stand by power consumption of 173μW, which can replace state-of-art commercial RTCs to improve the performance of portable and hand-held navigation receivers.
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陈亮,咸德勇,刘思慧,等.一种新型高精度低功耗守时芯片[J].国防科技大学学报,2013,35(3):176-180. CHEN Liang, XIAN Deyong, LIU Sihui, et al. A novel high-precision, low-power time-keeping chip[J]. Journal of National University of Defense Technology,2013,35(3):176-180.