A dual-mode reconfigurable GPS L1/BDS B1 radio frequency front-end adopting low intermediate frequency architecture was realized in 0.18μm CMOS process. An auto-calibrating circuit was used to adjust the intermediate frequency filter′s time constant and to reduce frequency uncertainty. A 4-bits capacitors array was designed to widen the frequency tuning range of the voltage controlled oscillator and to improve phase noise performance. The system power consumption was reduced by hardware reuse technique. Test results show that the power consumption is 37.8mW with 1.8V voltage supply, and the voltage gain is 103dB, while the noise figures are less than 3.2dB in both GPS L1 and BDS B1.