Hierarchy of High Speed 3D Terrain Display
DOI:
CSTR:
Author:
Affiliation:

Clc Number:

Fund Project:

  • Article
  • |
  • Figures
  • |
  • Metrics
  • |
  • Reference
  • |
  • Related
  • |
  • Cited by
  • |
  • Materials
  • |
  • Comments
    Abstract:

    From viewpoint that the hardware and the software of special 3D terrain system must be designed by ourselves, we discuss the architecture,key techniques and their realization of a typical high speed 3D terrain system in this paper. First of all we select high speed processor INTEL i860 as kernel of the system. Then we design a special unit called' allocating tree' to solve the contention and bottleneck problem caused by mutil-tunnel outputs. Thirdly,we realize the hardware Z-buffer algorithm,by which visible surface determination can be sped. Lastly,we use mutil-frame buffer technique to support high refresh of mutil tunnels and mutil drawing bodies.

    Reference
    Related
    Cited by
Get Citation
Share
Article Metrics
  • Abstract:
  • PDF:
  • HTML:
  • Cited by:
History
  • Received:December 05,1993
  • Revised:
  • Adopted:
  • Online: January 23,2015
  • Published:
Article QR Code