LS-DSP, of which the inner coprocessor is composed of process unit PE, is a Digital Signal Processor used for aerospace image processing. Router is a special unit which interlinks PE net array, and it is also the part most frequently used for operation. How to depress power of processor and elevate calculate efficiency is an important topic for research. Aimed at a low power improvement in the circuit of LS-DSP router, a design base on clock-gating was carried out, and the algorithm was taken as an example to make the power consumption analysis and comparison of the control and operation process. The experimental results show that the improved architecture can reduce the router power consumption by 76%.