Continuing growth in link speeds and the number of advertised IP prefixes places increasing demands on the performance of Internet routers. In view of this fact, a parallel router architecture based on partial forwarding and pipelining switching is proposed. The architecture consists of multi-stage, lower speed nodes performing IP-lookups and switching independently, thus IP-lookups and switching for multiple packets have been pipelined. We investigate the key technologies of this architecture including the logical mapping from subtries to function components as well as the pipelining IP-lookup mechanism based on subtrie. Finally, future directions and possible open problems are discussed.