The efficient high-speed VLSI implementations of sphere detector providing soft information for a subsequent error correcting decoder are not trivial due to their high computational complexity. Therefore, a VLSI solution for soft-output sphere detector based on depth-first tree search and ONPC architecture is presented. In a 0.13-μm CMOS process, the proposed detector solution can achieve 14 Mbps at a signal-to-noise ration of 17.7dB for 4×4 MIMO system with 64-QAM using only approximately 4.1mm², and realize a better BER performance than K-best algorithm with 256 survivor paths based on depth-first search.