Abstract:Present analytical conclusion of GNSS carrier tracking digital phase-locked loop (DPLL) phase jitter due to oscillator phase noise is derived based on the linear model of analog PLL. It is, however, not able to reveal the relationship between phase jitter and the coherent integration time (CIT), and it cannot guide the high sensitivity and high precision carrier tracking DPLL parameter design effectively. Firstly, this research derived the power spectral density of white frequency and random walk frequency phase noise sequences output from the phase detector. Secondly, the formulae of phase jitter were obtained based on the DPLL linear model and verified by simulation. Finally, analytical and numerical analysis on the obtained phase jitter formulae was carried out. The analysis results show that, both of DPLL phase jitter due to white and random walk frequency noise increase as the CIT grows, and decrease firstly and then increase as the loop bandwidth grows. The phase jitter formulae and the conclusions, which describe the relationship between DPLL phase jitter and the loop bandwidth and the CIT, can be used as guideline for GNSS carrier tracking DPLL parameter design.