VLIW scheduling for high performance embedded energy-efficient processor
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    Abstract:

    To reduce the power, the energy-efficient embedded microprocessor always adopts the distributed and hierarchical register file structure (DHRF). Many data need to be stored in the second level general register file (GRF) because of the small capacity of the tiny operand register file (TORF), and this challenges the design of compiler. A new VLIW scheduling algorithm is proposed to solve the problem through analyzing the program characteristics. The variables are detected while the compiling and virtual copy operations are inserted at the appropriate time. Through instruction scheduling and communication scheduling for the copy operations and constructing new data transfer route including GRF for the global variables and software pipelining variables, which have great demand for the register, the pressure on TORF is transferred to GRF. The experimental results show that the VLIW scheduling algorithm is consistent with the starting point of the energy-efficient microprocessor. On the condition of 8% program performance decline, the energy consumption on register accessing is reduced by about 51%, and the energy consumption of the processor is reduced by about 43%. At the same time, the burden of programmer is avoided.

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History
  • Received:June 20,2011
  • Revised:
  • Adopted:
  • Online: January 11,2013
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