Design and implement of a NAND Flash controller with pipelining program and non-missing invalid block handle method
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    Abstract:

    Aiming at requirement of high speed and complete of data in space storage system, the design of a high performance NAND Flash controller is present. It concludes a pipelining-programming inside of NAND Flash chip and a non-missing invalid block method. The storage implementation is present. The calculation of storage time in different situation is discussed. The simulation modules are present and the impact of pipelining programming is simulated and discussed using Monte Carlo method. Practical application proves the pipelining programming and non missing invalid block method. The operation frequency of storage system achieves to 100MB/s, ensuring accuracy, completeness and continuity of data.

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History
  • Received:June 30,2014
  • Revised:
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  • Online: March 19,2015
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