Hardware Boolean satisfiability solver with enhanced constraint
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    Abstract:

    Taking advantage of parallelism and flexibility of field-programmable gate array, a novel Boolean satisfiability solver based on an improved local search algorithm on the reconfigurable hardware platform was proposed to solve largescale Boolean satisfiability problems. In comparison with the past solver, the preprocessing technology can strongly improve the efficiency of solver; the strategy of strengthening the variable selection can avoid the same variable flipped continuously and repeatedly. It can reduce the possibility of search falling into local optimum. The experimental results indicate that the solver can solve problems of up to 32k variables/128k clauses, and has better performance than previous works.

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History
  • Received:September 18,2017
  • Revised:
  • Adopted:
  • Online: January 17,2019
  • Published: December 28,2018
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