The S-Tag (Shadow Tag) mechanism of SRAM(static random access memory) data consistency maintaining for DMA(direct memory access) accessing was proposed for the independent design of MDSP(multi-core digital signal processor). The pipelining implementation can efficiently support DMA nonblocking data transfer, and release the CPU. Experimental results and tests in real chips show that the proposed mechanism outperforms the state-of-art ones with respect to bandwidth and bandwidth utilization while keeping relatively lower hardware cost.