Design of highly reliable SpaceWire routers based on FPGA
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    Abstract:

    A system design method for SpaceWire router based on SRAM FPGA(fieldprogrammable gate array) was proposed to improve its reliability and availability. The router was hardened by system level triple modular redundancy; and the dynamic partial scrubbing technique based on bitstream relocation was adopted to repair the faulty module in case of soft errors. Meanwhile, a real-time state synchronization approach based on present input and healthy state was introduced to synchronize the repaired module′s state with the other modules′ after scrubbing. Hence the router is capable of error masking and selfhealing. The proposed design method was implemented and verified on the Xilinx Virtex-5 FPGA develop kit ML507. Experimental results show that the reliability and availability of the router are increased significantly. And the router′s real-time performance is satisfactory, such that it can offer normal service during the entire work process, without any interruption or delay in system functionality. Meanwhile, the amount of memory required is reduced to one-third of the original amount as a result of adopting the bitstream relocation technique, and the failure probability of the original bitstream is also greatly reduced.

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History
  • Received:April 10,2018
  • Revised:
  • Adopted:
  • Online: July 18,2019
  • Published: August 28,2019
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