An optimal design of SpaceFibre node transmission system was proposed to meet the high bandwidth, high reliability and light weight requirements for the SpaceFiber link between satellite payloads. This design adopts an incremental calculation method based on frame accumulation to reduce the redundancy of computing circuits, and satisfies the timing requirements for error detection operations through a four-stage pipeline architecture. The module balances the use of hardware resources by sharing CRC(cyclic redundancy check). To improve reliability, the design adopts a two-layer control strategy with complete response. Resource-optimized FSM(finite-state machine) and storage architecture are built to simplify the implementation of the retransmission algorithm. A verification system at board-level with two nodes was implemented in XC7Z100FFG900-2 FPGA(field programmable gate array). The results show that the design satisfies the functions stipulated by the standard. Compared with similar design schemes, the maximum frequency is increased by 1.5 times, and supports up to 6.25 Gbit/s transmission rate. And resources of lookup tables and storage are reduced, while register resources are similar. The design provides a reference for the development of high-speed and reliable SpaceFibre codecs with independent intellectual property rights.