| 引用本文: | 刘滨海,闻烽,王剑琪,等.顺序PROLOG机KD-PP的系统结构和硬件实现技术.[J].国防科技大学学报,1990,12(2):106-112.[点击复制] |
| Liu Binhai,Wen Feng,Wang Jianqi,et al.Architecture and Hardware Implementation Techniques of the Sequential PROLOG Machine: KD-PP[J].Journal of National University of Defense Technology,1990,12(2):106-112[点击复制] |
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| 顺序PROLOG机KD-PP的系统结构和硬件实现技术 |
| 刘滨海, 闻烽, 王剑琪, 张晨曦 |
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(计算机系)
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| 摘要: |
| 本文提出的KD-PP系统是一种基于编译技术的顺序PROLOG推理系统，该系统的设计为逻辑型程序语言PROLOG的实现提供了硬件支持，因而能高效地执行PROLOG程序。本文从数据表示、存储系统、机器状态和指令系统等方面全面地介绍了顺序 PROLOG机KD-PP的系统结构和硬件实现技术。 |
| 关键词: 系统结构，指令系统，存储器，PROLOG 系统，数据表示 |
| DOI： |
| 投稿日期：1989-06-25 |
| 基金项目: |
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| Architecture and Hardware Implementation Techniques of the Sequential PROLOG Machine: KD-PP |
| Liu Binhai, Wen Feng, Wang Jianqi, Zhang Chenxi |
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(Department of Computer science)
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| Abstract: |
| This paper describes a sequential PROLOG inference processor: KD-PP which is based on compilation techniques. The processor has incorporated hardware mechanisms in it for logic programming language PROLOG execution. So it can execute PROLOG programs at high speed. The architecture of the processor，including data format，memory，machine states，instruction set，and the hardware implementing techniques are described in detal. |
| Keywords: system architecture,instruction set,memory,PROLOG system,data format |
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