| 引用本文: | 王远模,赵宏钟,张军,等.用FPGA实现浮点FFT处理器的研究.[J].国防科技大学学报,2004,26(6):61-64.[点击复制] |
| WANG Yuanmo,ZHAO Hongzhong,ZHANG Jun,et al.The Realization of Flolating-point FFT Processor with FPGA Chip[J].Journal of National University of Defense Technology,2004,26(6):61-64[点击复制] |
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| 用FPGA实现浮点FFT处理器的研究 |
| 王远模, 赵宏钟, 张军, 付强 |
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(国防科技大学 电子科学与工程学院，湖南 长沙 410073)
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| 摘要: |
| 针对定点FFT处理器精度不高的缺点，提出了浮点格式FFT处理器的FPGA硬件实现方案。详细阐述了FFT处理器的自定制浮点格式确定、算法选择和浮点加法实现等关键技术。该处理器已投入使用，工作性能稳定，系统时钟80MHz，完成1024点FFT/IFFT运算只需64μs，误差小于-80dB。 |
| 关键词: FPGA FFT 蝶形运算 |
| DOI： |
| 投稿日期：2004-05-20 |
| 基金项目: |
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| The Realization of Flolating-point FFT Processor with FPGA Chip |
| WANG Yuanmo, ZHAO Hongzhong, ZHANG Jun, FU Qiang |
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(College of Electronic Science and Engineering, National Univ. of Defense Technology, Changsha 410073, China)
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| Abstract: |
| The FPGA realization of a floating-point FFT processor is proposed to get over the poor precision of the fixed-point FFT processor.The definition of the floating-point format,the selection of arithmetic and the key techniques of the FPGA realization are discussed. Such a processor has been put into service and has stable performance. Its operating frequency is 80MHz and it can finish 1024 point FFT/IFFT in 64μs with an error less than -80dB. |
| Keywords: FPGA FFT butterfly computation |
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