| 引用本文: | 杨乾明,伍楠,管茂林,等.ET：一种能耗有效的高性能嵌入式处理器.[J].国防科技大学学报,2011,33(6):24-30.[点击复制] |
| YANG Qianming,WU Nan,GUAN Maolin,et al.ET: An Energy-efficient Processor Architecture for Embedded Tera-scale Computing[J].Journal of National University of Defense Technology,2011,33(6):24-30[点击复制] |
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| ET：一种能耗有效的高性能嵌入式处理器 |
| 杨乾明, 伍楠, 管茂林, 张春元, 全巍, 黄达飞 |
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(国防科技大学 计算机学院，湖南 长沙 410073)
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| 摘要: |
| 随着标准和算法的不断演进，高端嵌入式应用对性能和能耗提出了越来越高的要求。然而，能耗问题成为将VLSI潜力转换为实际应用需求的最大挑战，基于此，提出ET（Embedded Tera-scale Computing）处理器设计。ET以众多轻量级处理器（称为小核）来搭建目标处理器，每个小核都是一个基于显式数据和指令管理的VLIW处理器，能单独执行一个线程，采用层次化的寄存器文件和非对称全分布式指令寄存器来分别降低数据和指令的供应能耗。为了进一步降低功耗，ET处理器采用了较短的运算流水线和简单的循环控制结构，并面向应用领域针对循环体进行优化。初步的实验结果表明，在40nm工艺下，ET处理器可以获得单芯片1TOPS以上的性能，同时保持操作能效比在100GOPS/W以上。 |
| 关键词: 嵌入式计算 能耗有效 层次化寄存器文件 |
| DOI： |
| 投稿日期：2011-06-20 |
| 基金项目:国家自然科学基金资助项目（61033008，60903041）；博士点基金资助项目（20104307110002） |
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| ET: An Energy-efficient Processor Architecture for Embedded Tera-scale Computing |
| YANG Qianming, WU Nan, GUAN Maolin, ZHANG Chunyuan, QUAN Wei, HUANG Dafei |
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(College of Computer, National Univ. of Defense Technology, Changsha 410073, China)
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| Abstract: |
| As criterions and algorithms evolve and become more complex, high performance embedded application demands the high performance and energy efficiency. The challenge, however, is how to turn the VLSI capability into the actual computing performance. This research proposed an energy efficient processor architecture named ET (Embedded Tera-scale Computing), which is composed of many lightweight VLIW processor cores, also named small cores. Each core executes a thread with the mechanisms for explicitly managing the data and instructions. ET uses a hierarchical data registers to reduce the cost of delivering data, and the asymmetric and distributed instruction registers to deliver the instructions. In order to further reduce the energy, ET employs non-deep pipeline and simple control flow and optimizes the execution of loop body of applications. The primary result shows that ET can achieve the 1TOPS performance and the 100GOPS/W efficiency when scaled to 40nm. |
| Keywords: embedded computing energy-efficient hierarchy register file |
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