引用本文: | 孙永节,刘必慰.基于DICE单元的抗SEU加固SRAM设计.[J].国防科技大学学报,2012,34(4):158-163.[点击复制] |
SUN Yongjie,LIU Biwei.SEU hardened SRAM design based on DICE cell[J].Journal of National University of Defense Technology,2012,34(4):158-163[点击复制] |
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基于DICE单元的抗SEU加固SRAM设计 |
孙永节, 刘必慰 |
(国防科技大学 计算机学院,湖南 长沙 410073)
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摘要: |
DICE单元是一种有效的SEU加固方法,但是,基于DICE单元的SRAM在读写过程中发生的SEU失效以及其外围电路中发生的失效,仍然是加固SRAM中的薄弱环节。针对这些问题,提出了分离位线结构以解决DICE单元读写过程中的翻转问题,并采用双模冗余的锁存器加固方法解决外围电路的SEU问题。模拟表明本文的方法能够有效弥补传统的基于DICE单元的SRAM的不足。 |
关键词: SEU加固 SRAM DICE单元 |
DOI: |
投稿日期:2011-12-24 |
基金项目:国家自然科学基金重点项目(60836004);国家自然科学基金项目(61006070) |
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SEU hardened SRAM design based on DICE cell |
SUN Yongjie, LIU Biwei |
(College of Computer, National University of Defense Technology, Changsha 410073, China)
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Abstract: |
DICE cell is an effective method to mitigate SEU effects. SEU, however, still occur in DICE cell-based SRAMs, due to the weakness of DICE cell during reading and writing, and the weakness in the peripheral circuits. A separated-bit-line structure is proposed to handle the DICE cell’s upset during reading and writing, and a double module redundancy method is presented to resolve the upset in the peripheral circuits. The simulation results show these methods are effective to mitigate SEU from DICE cell based SRAMs. |
Keywords: SEU hardened SRAM DICE cell |
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