| 引用本文: | 夏飞,聂晶,李荣春,等.现场可编程门阵列参数化多标准高吞吐率基4 Viterbi译码器.[J].国防科技大学学报,2016,38(1):86-92.[点击复制] |
| XIA Fei,NIE Jing,LI Rongchun,et al.Parameterized multi-standard high-throughput radix-4 Viterbi decoder on field-programmable gate array[J].Journal of National University of Defense Technology,2016,38(1):86-92[点击复制] |
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| 现场可编程门阵列参数化多标准高吞吐率基4 Viterbi译码器 |
| 夏飞1, 聂晶1, 李荣春2, 王文涛3 |
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(1.海军工程大学 电子工程学院， 湖北 武汉 430033;2. 国防科技大学 计算机学院， 湖南 长沙 410073;3.中国人民解放军91033部队， 山东 青岛 266034)
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| 摘要: |
| 为了同时达到高性能和灵活性的目标，提出一种基于现场可编程门阵列的参数化多标准自适应基4 Viterbi译码器。译码器采用3～9可变约束长度，1/2、1/3可变码率，支持任意截断长度的纠错译码，并采用码字无符号量化、加比选单元设计优化和归一化判断逻辑分离策略优化关键路径设计，提高译码器工作频率。实验结果表明，该译码器能根据用户设定的参数改变结构，在多种通信标准之间实现动态切换；性能达到了541 Mbps，明显优于相关工作；对GPRS，WiMAX，LTE，CDMA，3G等通信标准都取得了良好的误码性能，可满足多种通信标准的译码需求。 |
| 关键词: 现场可编程门阵列 Viterbi译码器 参数化 多标准 基4 |
| DOI：10.11887/j.cn.201601015 |
| 投稿日期：2015-02-13 |
| 基金项目:国家自然科学基金资助项目（61202127）；湖南省学位与研究生教育专项基金资助项目（YB2013B008） |
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| Parameterized multi-standard high-throughput radix-4 Viterbi decoder on field-programmable gate array |
| XIA Fei1, NIE Jing1, LI Rongchun2, WANG Wentao3 |
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(1. Electronic Engineering College, Naval University of Engineering, Wuhan 430033, China;2. College of Computer Science, National University of Defense Technology, Changsha 410073, China;3. The PLA Unit 91033, Qingdao 266034， China)
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| Abstract: |
| To achieve the goal of high performance and flexibility, a parameterized multi-standard adaptive radix-4 Viterbi decoder based on the field-programmable gate array was presented. This decoder adopts constraint lengths ranging from 3 to 9, code rates of 1/2 or 1/3 and supports error-correcting decoding of arbitrary truncation lengths. The unsigned quantization, add-compare-select unit optimization and normalization judgment logic separation strategies were used to optimize the design of critical path, so that it can improve system throughput. Experiment results show that: the decoder can change the structures according to the parameters set by users and achieve dynamic switching in multiple communication standards; the throughput can reach up to 541 Mbps, apparently superior to the related works; the decoder achieves low bit error ratio in multiple standards such as GPRS, WiMax, LTE, CDMA and 3G and satisfies the decoding requirements of multiple communication standards. |
| Keywords: field-programmable gate array Viterbi decoder parameterization multi-standard radix-4 |
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