引用本文: | 雷菁,董乐,李二保.低错误平层数列分割移位低密度奇偶校验码构造算法.[J].国防科技大学学报,2017,39(2):107-113.[点击复制] |
LEI Jing,DONG Le,LI Erbao.Construction algorithm of APPS-LDPC codes with low error floor[J].Journal of National University of Defense Technology,2017,39(2):107-113[点击复制] |
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低错误平层数列分割移位低密度奇偶校验码构造算法 |
雷菁1, 董乐1,2, 李二保1 |
(1. 国防科技大学 电子科学与工程学院, 湖南 长沙 410073;2.
2. 中国电子科技集团公司第二十九研究所, 四川 成都 610036)
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摘要: |
为降低LDPC(低密度奇偶校验码)码错误平层,提出一种基于环分类搜索的APPS LDPC(数列分割移位的LDPC)码构造算法。该算法具有码长、码率和列重的任意可设性,同时该类码的Tanner图围长至少为8。循环移位因子可以通过简单的代数表达式描述,从而降低内存需求。仿真结果表明,当误码率达到10-5时,APPS-LDPC码(496,248)相对于PEG-LDPC(渐进边增长LDPC)码获得了约1.9 dB的性能提升;随着信噪比的升高,两条译码性能曲线之间的差距将更大。此外,列重为3的APPS-LDPC码(6144,5376)在信噪比4.6 dB以后并未出现明显的错误平层。该构造算法与PS-LDPC码相比,在误码率达到10-8时大约获得0.25 dB增益;与围长为4和6的PEG构造算法相比,在错误平层区域其译码性能极优;同时相较于此两者,其构造复杂度和耗时也展现出一定优势。通过基于Tanner图的诱捕集分析方法,统计APPS-LDPC码 (496,248) 中由8环组成的部分小型诱捕集并不存在,从而证明了其错误平层降低的原因。 |
关键词: 准循环低密度奇偶校验码 错误平层 诱捕集 环结构 围长 数列分割移位 |
DOI:10.11887/j.cn.201702016 |
投稿日期:2015-09-21 |
基金项目:国家自然科学基金资助项目(61372098,61501479) |
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Construction algorithm of APPS-LDPC codes with low error floor |
LEI Jing1, DONG Le1,2, LI Erbao1 |
(1. College of Electronic Science and Engineering, National University of Defense Technology, Changsha 410073, China;2.
2. The 29th Research Institute of China Electronics Technology Group Corporation, Chengdu 610036, China)
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Abstract: |
In order to lower the error floor of LDPC (low-density parity-check) codes, a new class of APPS-LDPC (arithmetic progression and partition shift LDPC) codes was proposed. The APPS-LDPC codes are based on cycle path description theory with arbitrary code length, code rate, column weight. The girth of their Tanner graph is at least eight. Cyclic shift coefficients can be described in simple analytic expressions to reduce required memory usage. The simulation results show that the proposed APPS-LDPC code (496,248) gets a coding gain of 1.9 dB at least compared to the PEG LDPC (progressive edge growth LDPC) code at BER (bit error rate) 10-5. And at high signal to noise ratio region, the gap between two decoding curve increases gradually. Besides, APPS-LDPC code (6144, 5376) whose column degree is 3 gets a coding gain of 0.25 dB at least compared to the PS-LDPC code at BER 10-8, and there′s no obvious error floor phenomenon when the signal to noise is above 4.6 dB. The performance of the proposed algorithm also outperforms the 4-girth or the 6-girth PEG-based LDPC codes, especially in error floor region. The time-consuming and complexity for constructing an APPS-LDPC code also show some advantages over PS-LDPC code and PEG-LDPC code. And through trapping sets searching method based on Tanner graph, there is no small trapping set composed by cycle 8 in (496,248) APPS-LDPC code, which demonstrates the reduction of the error floor. |
Keywords: quasi-cyclic low-density parity-check codes error floor trapping sets cycles girth arithmetic progression and partition shift |
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