引用本文: | 胡婉如,王竹刚,梅如如,等.高速并行Gardner算法设计与实现[J].国防科技大学学报,2023,45(2):95-104.[点击复制] |
HU Wanru,WANG Zhugang,MEI Ruru,et al.Design and implementation of high speed parallel Gardner algorithm[J].Journal of National University of Defense Technology,2023,45(2):95-104[点击复制] |
|
|
|
本文已被:浏览 3871次 下载 2596次 |
高速并行Gardner算法设计与实现 |
胡婉如1,2,王竹刚1,梅如如1,2,陈轩1,2,张颖1,2 |
(1. 中国科学院国家空间科学中心 复杂航天系统电子信息技术重点实验室, 北京 100190;2. 中国科学院大学, 北京 100049)
|
摘要: |
随着空间探测任务逐步增加、空间信道频谱资源日趋紧张,传统Gardner定时同步算法已经无法满足高速数传系统高通量、高可靠性的需求。为了提高Gardner定时同步算法的吞吐率并增大可纠正误差范围,提出一种高速并行Gardner算法。为了保证插值精度同时减少乘法器消耗,设计了一种并行分段抛物线插值滤波器;为了便于并行流水线设计和最佳采样点选取,构建了计数模块和定时缓存调整模块;为了提高等价吞吐率,重构了流水线并行环路滤波器结构和并行数控振荡器结构。结果表明,该算法等价吞吐率可达1 739.13 Msps,数字信号处理器资源消耗可减少44%,可纠正2×10-3的定时误差。 |
关键词: 定时同步 并行Gardner算法 流水线设计 抛物线插值 计数模块 定时缓存调整模块 |
DOI:10.11887/j.cn.202302011 |
投稿日期:2021-04-10 |
基金项目:中国科学院战略性先导科技专项(A类)资助项目(XDA153501) |
|
Design and implementation of high speed parallel Gardner algorithm |
HU Wanru1,2, WANG Zhugang1, MEI Ruru1,2, CHEN Xuan1,2, ZHANG Ying1,2 |
(1. Key Laboratory of Electronics and Information Technology for Space System, National Space Science Center, Chinese Academy of Sciences, Beijing 100190, China;2. University of Chinese Academy of Sciences, Beijing 100049, China)
|
Abstract: |
With the gradual increase of space exploration tasks and the increasing tension of space channel spectrum resources, the traditional Gardner timing synchronization algorithm can no longer meet the demand of high throughput and high reliability of high-speed data transmission system. In order to improve the throughput and increase the correctable error range of Gardner timing synchronization algorithm, a high-speed parallel Gardner algorithm was proposed. To ensure the interpolation accuracy and reduce the multiplier consumption, a parallel piecewise parabolic interpolation filter was designed. To facilitate the parallel pipeline design and optimal sampling point selection, a counting module and a timing cache adjustment module were built. To improve the equivalent throughput rate, the pipelined parallel loop filter structure and the pipelined parallel numerically controlled oscillator structure were reconstructed. Results show that the equivalent throughput rate of the algorithm can reach 1 739.13 Msps, the digital signal processor resource consumption can be reduced by 44%, and the timing error of 2×10-3 can be corrected. |
Keywords: timing synchronization parallel Gardner algorithm pipeline design parabolic interpolation counting module timing cache adjustment module |
|
|
|
|
|