Hierarchy of High Speed 3D Terrain Display
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    Abstract:

    From viewpoint that the hardware and the software of special 3D terrain system must be designed by ourselves, we discuss the architecture,key techniques and their realization of a typical high speed 3D terrain system in this paper. First of all we select high speed processor INTEL i860 as kernel of the system. Then we design a special unit called' allocating tree' to solve the contention and bottleneck problem caused by mutil-tunnel outputs. Thirdly,we realize the hardware Z-buffer algorithm,by which visible surface determination can be sped. Lastly,we use mutil-frame buffer technique to support high refresh of mutil tunnels and mutil drawing bodies.

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Hao Jianxin, Cai Xuanping, Sun Maoyin. Hierarchy of High Speed 3D Terrain Display[J]. Journal of National University of Defense Technology,1994,16(3):19-24.

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History
  • Received:December 05,1993
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  • Online: January 23,2015
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