Design for Asynchronism Latching Accumulator of SINS

Home > Archive>Volume 25, Issue 2, 2003 >95-98

Design for Asynchronism Latching Accumulator of SINS
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Abstract:

The method which adopts FPGA chip to design for asynchronism latching accumulator of SINS is introduced. The accumulator's performance is analyzed and tested.

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JIANG Mingming, WU Meiping, TUO Zhouhui. Design for Asynchronism Latching Accumulator of SINS[J]. Journal of National University of Defense Technology,2003,25(2):95-98.

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Received:September 27,2003
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Online: June 14,2013
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