Process fluctuation influence on single event upset in sub-20 nm FinFET SRAM
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TN405

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    Abstract:

    To invesitage the process fluctuation influence on SRAM single event upset in sub-20 nm FinFET process, this paper builds a high precision three dimentional SRAM TCAD model based on commercial process variation, then simulates to find the SRAM single event upset threshold. The simulation results show that the SRAM upset threshold has less fluctuation induced by process corner variation. Meanwhile, the sensitive posision of SRAM is the NMOS drain node. Then, to understand the detailed process influence, this paper discusses the process factor fluctuations impact on single event upset, including fin width, fin height, oxide thickness and work function fluctuation. The simulation results show that fin width and height do not influence the upset threshold, while oxide thickness and work function influence it. This paper firstly finds that the process fluctuation plays less role in FinFET, which provides detailed investigation for high consistent radiation hardened integrated circuit designs.

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History
  • Received:January 04,2024
  • Revised:April 09,2024
  • Adopted:April 10,2024
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